A µm CTIA ROIC for SWIR FPAs - PDF

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A µm CTIA ROIC for SWIR FPAs Selim Eminoglu, Murat Isikhan, Nusret Bayhan, M. Ali Gulden, O. Samet Incedere, S. Tuncer Soyer, Serhat Kocak, Cem Yalcin, M. Cem B. Ustundag, Ozge Turan, Umut

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A µm CTIA ROIC for SWIR FPAs Selim Eminoglu, Murat Isikhan, Nusret Bayhan, M. Ali Gulden, O. Samet Incedere, S. Tuncer Soyer, Serhat Kocak, Cem Yalcin, M. Cem B. Ustundag, Ozge Turan, Umut Eksi, and Tayfun Akin Mikro-Tasarim Ltd., ODTU-Teknokent, Ankara, 06530, TURKEY ABSTRACT This paper reports the development of a new SXGA format low-noise CTIA ROIC (MT12815CA-3G) suitable for mega-pixel SWIR InGaAs detector arrays for low-light imaging applications. MT12815CA-3G is the first mega-pixel standard ROIC product from Mikro-Tasarim, which is a fabless semiconductor company specialized in the development of ROICs and ASICs for visible and infrared hybrid imaging sensors. MT12815CA-3G is a low-noise snapshot mega-pixel CTIA ROIC, has a format of (SXGA) and pixel pitch of 15 µm. MT12815CA-3G has been developed with the system-on-chip architecture in mind, where all the timing and biasing for this ROIC are generated on-chip without requiring any special external inputs. MT12815CA-3G is a highly configurable ROIC with many features that can be programmed through a 3-wire serial interface allowing on-the-fly configuration the ROIC. It performs snapshot operation both using Integrate-Then-Read (ITR) and Integrate-While-Read (IWR) modes. The CTIA type pixel input circuitry has 3 gain modes with programmable full-well-capacity (FWC) values of 10K e-, 20K e-, and 350K e- in the very high gain (VHG), high-gain (HG), and low-gain (LG) modes, respectively. MT12815CA-3G has an input referred noise level of less than 5 e- in the very high gain (VHG) mode, suitable for very low-noise SWIR imaging applications. MT12815CA-3G has 8 analog video outputs that can be programmed in 8, 4, or 2-output modes with a selectable analog reference for pseudo-differential operation. The ROIC runs at 10 MHz and supports frame rate values up to 55 fps in the 8-output mode. The integration time of the ROIC can be programmed up to 1s in steps of 0.1 µs. The ROIC uses 3.3 V and 1.8V supply voltages and dissipates less than 350 mw in the 4-output mode. MT12815CA-3G is fabricated using a modern mixed-signal CMOS process on 200 mm CMOS wafers, and there are 44 ROIC parts per wafer. The probe tests show that the die yield is higher than 70%, which corresponds to more than 30 working ROIC parts per wafer typically. MT12815CA-3G ROIC is available as tested wafers or dies, where a detailed test report and wafer map are provided for each wafer. A compact USB 3.0 based test camera and imaging software are also available for the customers to test and evaluate the imaging performance of SWIR sensors built using MT12815CA-3G ROICs. Mikro-Tasarim has also recently developed a programmable mixed-signal application specific integrated circuit (ASIC), called MTAS1410X8, which is designed to perform ROIC driving and digitization functions for ROICs with analog outputs, such as MT12815CA-3G and MT6415CA ROIC products of Mikro-Tasarim. MTAS1410X8 has 8 simultaneously working 14-bit analog-to-digital converters (ADCs) with integrated programmable gain amplifiers (PGAs), video input buffers, programmable controller, and high-speed digital video interface supporting various formats including Camera Link. MT12815CA-3G ROIC together with MTAS1410X8 ASIC can be used to develop low-noise high-resolution SWIR imaging sensors with low power dissipation and reduced board area for the camera electronics. Keywords: SWIR, ROIC, CTIA, , MT12815CA-3G, snapshot, low-noise, InGaAs, ASIC, MTAS1410X8 1. INTRODUCTION Mikro-Tasarim is a fabless IC design company, specialized in the development of Readout Integrated Circuits (ROICs) and Application Specific Integrated Circuits (ASICs) for hybrid and monolithic infrared Focal Plane Arrays (FPAs) working in the SWIR, MWIR, and LWIR optical bands [1-6]. Hybrid FPAs are built using a two-chip solution composed of a ROIC and photodiode detector array (PDA). The PDA is fabricated using detector materials with low band gap energy levels to be able to detect low energy infrared photons. Hybrid infrared FPAs typically require cryogenic operation down to liquid nitrogen temperature (77K) or lower to be able to reduce the thermally generated dark current in the detector pixels. The PDAs used for the hybrid infrared FPAs are built using various detector materials such as InGaAs, InSb, HgCdTe, QWIP, and Type-II Super Lattice (T2SL). Infrared Technology and Applications XLI, edited by Bjørn F. Andresen, Gabor F. Fulop, Charles M. Hanson, Paul R. Norton, Proc. of SPIE Vol. 9451, 94510W 2015 SPIE CCC code: X/15/$18 doi: / Proc. of SPIE Vol W-1 The spectral bands of the hybrid infrared FPAs put different requirements for the ROICs in terms of pixel input circuitry type, Full-Well-Capacity (FWC), and FPA operating temperature, making it necessary to use optimized ROIC products for different PDAs working in different spectral bands. Table 1 gives the list of the standard ROIC products of Mikro-Tasarim developed for various infrared FPAs working in the SWIR, MWIR, and LWIR bands [6]. Mikro-Tasarim provides standard ROIC products for hybrid infrared FPAs built using various detector types with wide range of input circuitry selections (SF: Source Follower, DI: Direct-Injection, and CTIA: Capacitive Trans-Impedance Amplifier), with different FWC values, and capable of operating from room temperature down to cryogenic temperatures. Mikro-Tasarim also offers standard ROICs for uncooled microbolometer FPAs with resistive pixel arrays, which are fabricated monolithically at wafer level using MEMS based surface micro-machining techniques [3-4]. Mikro-Tasarim recently announced a product line composed of ASICs, which are developed to drive and digitize analog ROIC products to simplify the system integration and enable the development of high performance camera cores with reduced size and power dissipation. Mikro-Tasarim has recently been focused on the development of ROICs and ASICs for uncooled infrared FPAs, such hybrid SWIR imaging sensors using InGaAs detector arrays and monolithic LWIR imaging sensors using microbolometer detector arrays. One common property for these FPA types is that they are operated at room temperature, are small in size, have relatively lower cost compared to their cooled alternatives, and therefore have a great potential for high volume commercial and industrial applications. I Table 1. Standard ROIC products of Mikro-Tasarim developed for various infrared FPAs [6]. Il G Product MT6425DA MT6425CA MT6415CA MT12815CA-3G MT3825BA MT1625BA Die Photo FPA Format Pixel Pitch 25µm 25µm 15µm 15µm 25µm 25µm Input Type DI CTIA CTIA CTIA µbolometer µbolometer PDA Type Spectral Band InSb, HgCdTe, QWIP, T2SL InGaAs, HgCdTe InGaAs, HgCdTe InGaAs, HgCdTe MWIR, LWIR SWIR SWIR SWIR LWIR LWIR VOx VOx SWIR FPAs using InGaAs detector arrays gained considerable attention over the last years due to unique advantages of both SWIR optical band and mature InGaAs FPA technology [7-11]. It is relatively easier for the viewers to understand SWIR images as they look similar to the visible images, since both type of images are formed by capturing the reflected light from the ambient rather than the radiated light common for MWIR and LWIR bands. In addition, SWIR light can pass through regular glass, allowing the use of lower cost optics [8]. Furthermore, the dark current values in the InGaAs FPAs have been decreased considerably over the last years, which allows building compact and low-power uncooled SWIR cameras [9]. Finally, due to shorter wavelengths involved in SWIR imaging, potentially much smaller pixels, and therefore, more compact and higher resolution SWIR FPAs can be built without being limited by the optical diffraction phenomena [12], at least for practical pixel sizes that can be hybridized with the flip-chip technique. Furthermore, there are some efforts to fabricate very low-cost SWIR sensors using colloidal quantum dots deposited and patterned monolithically over the ROICs at wafer level [13]. This new monolithic technology, at the expense of reduced sensitivity, can potentially reduce the manufacturing cost of the SWIR FPAs drastically, compared to the conventional InGaAs or HgCdTe based SWIR FPA fabrication technologies utilizing flip-chip technique at individual die level. Proc. of SPIE Vol W-2 Mikro-Tasarim offers three CTIA ROICs as standard products, which have system-on-chip architecture with snapshot operation capability, where all the required timing, biasing, and configuration are done using on-chip circuitry without requiring any critical external inputs. MT6425CA is the first standard CTIA ROIC product of Mikro-Tasarim, and has a format of and pixel pitch of 25µm [1]. It has a full-well capacity of 320K electrons and input noise level of 110 e- rms. MT6415CA is the second standard CTIA ROIC of Mikro-Tasarim, which has a format of and pixel pitch of 15µm [2]. MT6415CA has 3 programmable gain settings of very-high-gain (VHG), high-gain (HG) and low-gain (LG), with 10K, 20K, and 350K electrons full-well capacity values, respectively. In the VHG gain mode, the MT6415CA has an input referred noise level of 5 e- rms in the integrate-then-read (ITR) snapshot readout mode [2]. MT6415CA has already been coupled with InGaAs detector arrays and a very compact camera module has been developed which measures 32mm 32mm 35mm and weighs less than 45 gr without the optics [5]. Mikro-Tasarim has also introduced flat surface version of the MT6415CA ROICs for wafer level monolithic fabrication of SWIR FPAs using colloidal quantum dots, potentially suitable for low-cost high-volume applications. This paper reports the third standard CTIA ROIC product from Mikro-Tasarim, namely MT12815CA-3G, which is a CTIA ROIC with snapshot operation having a format and 15µm pixel pitch, which is developed mainly for the SWIR InGaAs detector arrays for low-noise and high-resolution imaging applications. MT12815CA-3G has the same pixel and readout architecture as the MT6415CA, and supports 4 times larger pixel arrays. Similar to MT6415CA, MT12815CA-3G has also 3 programmable gain settings of very-high-gain (VHG), high-gain (HG) and low-gain (LG), with 10K, 20K, and 350K e- full-well capacity values, respectively. In the VHG gain mode, the MT12815CA-3G ROIC has an input referred noise level of 5 e- rms in the integrate-then-read (ITR) snapshot readout mode. This paper also reports the development of a programmable mixed-signal application specific integrated circuit (ASIC), called MTAS1410X8, which is designed to perform ROIC driving and digitization functions mainly for the MT12815CA-3G and MT6415CA ROIC products of Mikro-Tasarim. This ASIC has a configurable system-on-chip (SoC) architecture, allowing it to be used together with other ROICs with digital control and analog output features. MTAS1410X8 ASIC integrates all the external circuitry required to drive the analog ROICs and to digitize their analog video outputs. It has 8 simultaneously sampling 14-bit analog-to-digital converters (ADCs) with integrated programmable gain amplifiers (PGAs), video input buffers, programmable controller, and high-speed digital video interface supporting various formats including Camera Link. MT12815CA-3G ROIC together with MTAS1410X8 ASIC can be used to develop low-noise and high-resolution SWIR imaging sensors with low power dissipation and reduced board area for the camera electronics. 2. ROIC FEATURES MT12815CA-3G is a low-noise snapshot CTIA ROIC, which has a format of and a pixel pitch of 15 µm. It has been developed with the system-on-chip architecture in mind, where all the timing and biasing for this ROIC are generated on-chip without requiring any external inputs. The ROIC has a array of pixel input circuitry surrounded by a 10 pixel wide detector common ring. On the ROIC, there is an array of pixel pad openings with a format of , a uniform pitch of 15 µm, and a pad opening size of 4 µm 4 µm. The ROIC has been designed to interface both p-on-n and n-on-p detector arrays, where the detector bias can be programmed in 0.7 mv steps. Table 2 summarizes the technical specifications of the MT12815CA-3G ROIC. MT12815CA-3G has various programmable features, such as detector biasing, full-well-capacity, integration time, readout modes, number of outputs, window size, scanning direction, readout signal gain and offset, and number of outputs, all of which can be programmed via a simple 3-wire serial programming interface (SPI). MT12815CA-3G performs snapshot operation using Integrate-Then-Read (ITR) and Integrate-While-Read (IWR) modes. The CTIA type pixel input circuitry has three programmable gain settings with selectable Full-Well-Capacity (FWC) values of 10K e-, 20K e-, and 350K e- in the very high gain (VHG), high-gain (HG), and low-gain (LG) modes, respectively. MT12815CA-3G has an input referred noise level of less than 5 e- in the VHG mode, suitable for very low-noise SWIR imaging applications. MT12815CA-3G has 8 analog video outputs that can be programmed in the 8, 4, or 2-output modes with a selectable analog reference outputs for pseudo-differential operation. MT12815CA-3G has also an optional programmable reference clock output, which indicates the optimum sampling time for the analog video outputs to achieve proper settling at the analog ROIC outputs. Proc. of SPIE Vol W-3 Table 2. Technical specifications of MT12815CA-3G ROIC Array Format Pixel Pitch 15 µm Pixel Pad Openings 4 µm 4 µm Detector Common Ring 10 pixel wide ring around the active array Pixel Input Circuitry Capacitive Trans-impedance Amplifier (CTIA) Pixel Input Polarity Supports both p-on-n and n-on-p type detector arrays Full Well Capacity VHG: 10,000 e- HG: 20,000 e- LG: 350,000 e- Input Referred Read Noise VHG: 5 e- HG: 9 e- LG: 110 e- Snapshot Readout Modes Integrate-Then-Read (ITR) and Integrate-While-Read (IWR) Serial Programming Interface Programmable gain, biasing, timing, number of outputs, and configuration Integration Time Programmable up to 1 s in 100 ns steps Number of Analog Outputs Programmable as 2, 4, or 8 analog video outputs with 2 selectable references Output Swing and Gain 2.0 V with programmable gain and offset Pixel Data Rate Nominal 10 MHz per output (up to 12.5MHz) Frame Rate 55 fps at full frame rate in IWR mode at 10 MHz Scanning Direction Programmable in horizontal and vertical directions Windowing Programmable location and size Sub-Sampling 2:1 Sub-Sampling, image at full view with equivalent pitch of 30µm Detector Biasing On-Chip programmable biasing in 0.7mV steps Timing and Configuration On-Chip programmable ROIC timing and configuration Temperature Sensor On-Chip active sensor with 1mV/K sensitivity Operating Temperature Room Temperature (300K) and Cryogenic ( 65K) Supply Voltages 3.3V (Analog Blocks and Digital I/O) and 1.8V (Digital Core) Power Dissipation 350 mw in the 4-output mode Die Size 21.8 mm 21.1 mm Wafer Diameter 200 mm Die Per Wafer 44 total Typically 30 working after probe tests The MT12815CA-3G runs at 10 MHz and supports frame rates up to 55 fps in the 8-output mode. The operating frequency of the ROIC can be increased to 12.5 MHz to support faster scanning rates as high as 70 fps. The integration time can be programmed up to 1 s in 100 ns steps. The ROIC uses 3.3 V and 1.8 V supply voltages and dissipates less than 350 mw in the 4-output mode. The system-on-chip (SoC) architecture of MT12815CA-3G makes it suitable for software controlled imaging applications, where key parameters of the ROIC such as bias, gain, integration time, window size, and window location can be programmed through a 3-wire Serial Programming Interface (SPI) on-the-fly between the imaging frames with minimal communication overhead without causing any loss of frames in the continuous video stream. MT12815CA-3G is fabricated using a modern mixed-signal CMOS process on 200 mm CMOS wafers. There are 44 parts per wafer, and probe tests show that the die yield is more than 70%, resulting in more than 30 working parts per wafer on the average. Tested parts are available at wafer or die levels with test reports and wafer maps. Mikro-Tasarim has also recently introduced flat surface version of the MT12815CA-3G ROICs for wafer level monolithic fabrication of SWIR FPAs using colloidal quantum dots. A USB 3.0 based compact camera and imaging software are available allowing quick imaging tests of hybrid sensors built using MT12815CA-3G ROIC product. Proc. of SPIE Vol W-4 3. ROIC ARCHITECTURE Figure 1 shows the simplified architecture of the signal chain used in the MT12815CA-3G ROIC. MT12815CA-3G ROIC has basically the same architecture as the MT6415CA ROIC [2]. There is a CTIA type pixel input circuitry, which interfaces the detector pixel and performs current-to-voltage conversion in the pixel. The ROIC operates in the snapshot mode, where all the pixels are reset and integrated in parallel. The pixel array is then read out in a sequential manner, where one line of pixels is selected after another by the vertical scanner, also known as row decoder, and signals from the pixel array are sent to the column readout circuitry for signal conditioning and output multiplexing. The column readout circuitry is composed of parallel readout columns, each of which contains basically a column amplifier (CA), a sample-and-hold (S/H) circuit, and a column multiplexer switch. After the pixel signal is amplified by the column amplifier, the amplified signal is sampled and stored by the sample-and-hold circuit, before it gets multiplexed via the column switch in a sequential manner at column level controlled by the horizontal scanner, also known as column decoder. The multiplexed signal is then driven off chip by the output drivers (OD) operating at the pixel output data rate of the ROIC. CTIA Pixel Input Column Amplifier Sample & Hold Output Driver A CA S/H OD output Vertical Scanner Horizontal Scanner Figure 1. Simplified architecture of the signal chain integrated in MT12815CA-3G ROIC. Similar to MT6415CA ROIC, required biasing of the analog circuit modules in the MT12815CA-3G ROIC is generated on-chip by a programmable bias generator, allowing selection of the optimum biasing condition for the detector arrays or building blocks in the ROIC for a given imaging application in terms of speed and power. Similarly, required timing signals for the readout modules are generated on-chip by a highly programmable digital control circuit, which controls basic static and dynamic features such as the timing in the pixel array and column readout as well as general multiplexing operations performed in the ROIC for various operating modes and configurations. Many of these features are configurable on-the-fly through a simple 3-wire SPI, and the ones that have an effect on the ROIC operation are activated only between the frames to assure continuous video streaming without any frame synchronization problems. Figure 2 (a) and (b) show the digital output synchronization signals generated by MT12815CA-3G to simplify the interfacing of the ROIC with Camera Link frame grabbers for the ITR and IWR snapshot operation modes, respectively. For this purpose, MT12815CA-3G generates Frame_Valid, Line_Valid, Data_Valid, and Pixel_Clk signals, which can be turned off through SPI programming if they are not used. Frame_Valid defines the time during which the frame data is valid. Line_Valid defines the time during which the line data is valid, and Data_Valid defines the time during which the pixel data is valid for sampling by the Analog-to-Digital Converters (ADC) driven by the Pixel_Clk. For custom made systems, it is possible to use only the Data_Valid signal to capture the analog video data from the ROIC, and in this case, instead of using a dedicated Pixel_Clk output, sampling clock for the ADCs can be driven from the system clock with some additional delay required for the proper settling at the ROIC outputs. In the ITR case
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